Tutorials and invited lectures


[Cor19]
J. Cortadella. Extracting Functions from Boolean Relations. Presented at the workshop “Quo Vadis, Logic Synthesis?”, Design Automation and Test in Europe (DATE), Firenze (Italy), 29 March 2019. [ bib | PPT ]
[Cor17]
J. Cortadella. Making Petri nets friendlier to engineers. Workshop on Structure Theory of Petri Nets (STRUCTURE 2017), Zaragoza (Spain), 26 June 2017. [ bib | PPT ]
[Cor16a]
J. Cortadella. Adaptive Clocking. Tutorial on Modern Clocking Strategies, presented at the conference Design Automation and Test in Europe (DATE), 14 March 2016. [ bib | PPT | PDF ]
[Cor16b]
J. Cortadella. Synthesis of asynchronous controllers from Signal Transition Graphs. Lecture at EMICRO/SIM 2016 (18th South Microelectronics School / 31st South Symposium on Microelectronics), Porto Alegre (Brasil), 11-14 May 2016. [ bib | PPT ]
[CGOK15]
J. Cortadella, M. Galceran-Oms, and M. Kishinevsky. Automatic Pipelining During Sequential Logic Synthesis. EPFL Workshop on Logic Synthesis & Verification, 10-11 December 2015. [ bib | PPT | URL ]
[Cor13c]
J. Cortadella. Elastic circuits, blending synchronous and asynchronous technologies. Seminar at the Collège de France within the course on Algorithms, Machines and Languages organized by Gérard Berry, 21 May 2013. [ bib | Video | URL ]
[Cor13a]
J. Cortadella. Asynchronous circuits. Seminar at the Collège de France within the course on Algorithms, Machines and Languages organized by Gérard Berry, 14 May 2013. [ bib | Video | URL ]
[Cor13b]
J. Cortadella. Elastic circuits. Advanced course at EMICRO/SIM 2013 (XV Escola de Microeletrônica Sul / 28o Simpósio Sul de Microeletrônica), Porto Alegre (Brasil), 29 April-3 May 2013. [ bib | PPT ]
[CGOK10]
J. Cortadella, M. Galceran-Oms, and M. Kishinevsky. Elastic systems. Invited lecture at the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE), Grenoble (France), July 2010. [ bib | PPT | PDF ]
[CK07]
J. Cortadella and M. Kishinevsky. Elasticity and Petri nets. Advanced tutorial at the 28th Int. Conf. on Application and Theory of Petri Nets, Siedlce, Poland, June 2007. [ bib | PPT | PPT | PPT | PPT | PPT | PDF ]
[KCG+06]
Michael Kishinevsky, Jordi Cortadella, Bill Grundmann, Sava Krstic, and John O'Leary. Synchronous elastic circuits. In Dima Grigoriev, John Harrison, and Edward A. Hirsch, editors, Computer Science - Theory and Applications, First International Computer Science Symposium in Russia, CSR 2006, St. Petersburg, Russia, June 8-12, 2006, Proceedings, volume 3967 of Lecture Notes in Computer Science, pages 3--5. Springer, 2006. [ bib | PDF ]
[BCK04]
P.A. Beerel, J. Cortadella, and A. Kondratyev. Bridging the gap between asynchronous design and designers. Tutorial at the VLSI Design Conference, Mumbai, India, January 2004. [ bib | PPT | PPT | PPT | PPT | PPT | PDF ]
[CKK+02]
J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Hazard free logic synthesis and technology mapping. Lecture at the Summer School on Asynchronous Circuit Design, (organized by the ACiD-WG, Grenoble), July 2002. [ bib | PPT ]
[CY02]
J. Cortadella and A. Yakovlev. Petrify. Hands-on tutorial at the Summer School on Asynchronous Circuit Design, (organized by the ACiD-WG, Grenoble), July 2002. [ bib | TGZ ]
[Cor02]
J. Cortadella. Synthesis of embedded software for reactive systems. Invited lecture at the Int. Workshop on Integration of Specification Techniques for Applications in Engineering (Satellite event of ETAPS 2002), April 2002. [ bib | PPT ]
[CYG02]
J. Cortadella, A. Yakovlev, and J. Garside. Logic design of asynchronous circuits. Tutorial at the ASP-DAC/VLSI Design Conference, Bangalore, India, January 2002. [ bib | PPT | PPT | PPT | PPT | PS ]
[Cor00]
J. Cortadella. Tools for automatic synthesis and verification of asynchronous interfaces. Invited lecture at the workshop “Asynchronous Interfaces: Tools, techniques, and implementations” (AINT'2000), Delft, The Netherlands, July 2000. [ bib | PPT ]
[CLY00]
J. Cortadella, L. Lavagno, and A. Yakovlev. Hardware design and Petri nets. Advanced tutorial at the 21st Int. Conf. on Application and Theory of Petri Nets, Aarhus, Denmark, June 2000. [ bib | PPT | PPT | PPT | PPT | PPT ]
[CKK+00]
Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, and Alexandre Yakovlev. Hardware and Petri nets: Application to asynchronous circuit design. Invited lecture at the 21st Int. Conf. on Application and Theory of Petri Nets, Aarhus, Denmark, June 2000. [ bib | PPT | PS ]
[CKKL00]
J. Cortadella, M. Kishinevsky, A. Kondratyev, and L. Lavagno. Introduction to asynchronous circuit design: specification and synthesis. Tutorial at the 6th Int. Symp. on Advanced Research in Asynchronous Circuits and Systems, Eilat, Israel, April 2000. [ bib | PPT | PPT | PPT | PPT ]
[Cor99]
J. Cortadella. STG-based synthesis and petrify. Tutorial at the 3rd ACiD-WG Workshop, Newcastle upon Tyne, UK, January 1999. [ bib | PPT ]
[Cor98a]
J. Cortadella. Asynchronous circuit verification and synthesis with Petri nets. Invited lecture at the Workshop on Hardware Design and Petri Nets , Lisbon, June 1998. [ bib | PPT ]
[KCK98]
M. Kishinevsky, J. Cortadella, and A. Kondratyev. Asynchronous interface specification, analysis and synthesis. Embedded tutorial at the Design Automation Conference, San Francisco, USA, June 1998. [ bib | PPT ]
[Cor98b]
J. Cortadella. Combining structural and symbolic methods for the verification of concurrent systems. Invited lecture at the International Conference on Application of Concurrency to System Design (CSD'98), Aizu-Wakamatsu, Japan, March 1998. [ bib | PS | PDF ]
[CK97]
J. Cortadella and M. Kishinevsky. Synthesis of control circuits from STG specifications. Course in the Summer School on Asynchronous Circuit Design (organized by the ACiD-WG, ESPRIT 21949), Lyngby, Denmark, August 1997. [ bib | PS | PS ]

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