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@comment{{Command line: bib2bib -ob PHD.bib PHD_JC.bib}}
@phdthesis{Vidal2020, author = {Alex Vidal-Obiols}, title = {{Algorithmic Techniques for Physical Design: Macro Placement and Under-the-Cell Routing}}, school = {Universitat Polit\`ecnica de Catalunya}, month = jan, year = 2020, note = {Co-advised with Jordi Petit}, pdf = {files/PhD_Vidal.pdf} }
@phdthesis{Moreno2019, author = {Alberto Moreno}, title = {{Synthesis of Variability-Tolerant Circuits with Adaptive Clocking}}, school = {Universitat Polit\`ecnica de Catalunya}, month = mar, year = 2019, pdf = {files/PhD_Moreno.pdf} }
@phdthesis{Machado2019, author = {Lucas Machado}, title = {{Logic Decomposition and Adaptive Clocking for the Optimization of Digital Circuits}}, school = {Universitat Polit\`ecnica de Catalunya}, month = feb, year = 2019, pdf = {files/PhD_Machado.pdf} }
@phdthesis{deSanPedro2017, author = {Javier de San Pedro}, title = {{Structure discovery techniques for circuit design and process model visualization}}, school = {Universitat Polit\`ecnica de Catalunya}, month = oct, year = 2017, pdf = {files/PhD_deSanPedro.pdf} }
@phdthesis{Jain2017, author = {Palkesh Jain}, title = {{Algorithms and Methodologies for Interconnect Reliability Analysis of Integrated Circuits}}, school = {Universitat Polit\`ecnica de Catalunya}, month = may, year = 2017, note = {Co-advised with Sachin S. Sapatnekar}, pdf = {files/PhD_Jain.pdf} }
@phdthesis{Nikitin2013, author = {Nikita Nikitin}, title = {{Automatic Synthesis and Optimization of Chip Multiprocessors}}, school = {Universitat Polit\`ecnica de Catalunya}, month = apr, year = 2013, pdf = {files/PhD_Nikitin.pdf} }
@phdthesis{Galceran2011, author = {Marc Galceran-Oms}, title = {{Automatic Pipelining of Elastic Systems}}, school = {Universitat Polit\`ecnica de Catalunya}, month = sep, year = 2011, note = {Co-advised with Mike Kishinevsky}, pdf = {files/PhD_Galceran.pdf} }
@phdthesis{Costa2010, author = {Kyller Costa Gorg\^{o}nio}, title = {{Towards the Automatic Synthesis of Asynchronous Communication Mechanisms}}, school = {Universitat Polit\`ecnica de Catalunya}, month = dec, year = 2010, pdf = {files/PhD_Costa.pdf} }
@phdthesis{Bufistov2010, author = {Dmitry Bufistov}, title = {{Performance Optimization of Elastic Systems}}, school = {Universitat Polit\`ecnica de Catalunya}, month = dec, year = 2010, pdf = {files/PhD_Bufistov.pdf} }
@phdthesis{Baneres2008, author = {David Ba{\~n}eres}, title = {{Logic Synthesis Techniques for High-Speed Circuits}}, school = {Universitat Polit\`ecnica de Catalunya}, month = feb, year = 2008, note = {Co-advised with Mike Kishinevsky}, pdf = {files/PhD_Baneres.pdf} }
@phdthesis{Clariso2005, author = {Robert Claris\'o}, title = {{Abstract Interpretation Techniques for the Verification of Timed Systems}}, school = {Universitat Polit\`ecnica de Catalunya}, month = sep, year = 2005, pdf = {files/PhD_Clariso.pdf} }
@phdthesis{Carmona2004, author = {Josep Carmona}, title = {{Structural Methods for the Synthesis of Well-Formed Concurrent Specifications}}, school = {Universitat Polit\`ecnica de Catalunya}, month = mar, year = 2004, pdf = {files/PhD_Carmona.pdf} }
@phdthesis{Pena2003, author = {Marco A. Pe{\~n}a}, title = {{Relative Timing Based Verification of Concurrent Systems}}, school = {Universitat Polit\`ecnica de Catalunya}, month = apr, year = 2003, note = {Co-advised with Enric Pastor}, pdf = {files/PhD_Pena.pdf} }
@phdthesis{Cornetta2001, author = {Gianluca Cornetta}, title = {{Design and Analysis of Variable-Delay Arithmetic Units}}, school = {Universitat Polit\`ecnica de Catalunya}, month = dec, year = 2001 }
@phdthesis{Roig1997, author = {Oriol Roig}, title = {{Formal Verification and Testing of Asynchronous Circuits}}, school = {Universitat Polit\`ecnica de Catalunya}, month = may, year = 1997, pdf = {files/PhD_Roig.pdf} }
@phdthesis{Musoll1996, author = {Enric Musoll}, title = {{High-level and logic synthesis techniques for low power}}, school = {Universitat Polit\`ecnica de Catalunya}, month = jul, year = 1996, pdf = {files/PhD_Musoll.pdf} }
@phdthesis{Pastor1996, author = {Enric Pastor}, title = {{Structural Methods for the Synthesis of Asynchronous Circuits from Signal Transition Graphs}}, school = {Universitat Polit\`ecnica de Catalunya}, month = apr, year = 1996, ps = {ftp://ftp.ac.upc.es/pub/archives/cad/Thesis/thesis_enric.ps.gz} }
@phdthesis{Sanchez1996, author = {Ferm\'{\i}n S\'anchez}, title = {{Loop pipelining with resource and timing constraints}}, school = {Universitat Polit\`ecnica de Catalunya}, month = jan, year = 1996, ps = {ftp://www.ac.upc.es/pub/archives/cad/Thesis/thesis_fermin.ps.gz} }
@phdthesis{Badia1994, author = {Rosa M. Badia}, title = {{High-level synthesis of asynchronous circuits}}, school = {Universitat Polit\`ecnica de Catalunya}, month = jul, year = 1994 }
@phdthesis{Jove1989, author = {Teodor Jov\'e}, title = {{Design of instruction memories for pipelined processors}}, school = {Universitat Polit\`ecnica de Catalunya}, month = oct, year = 1989 }
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