Jordi Cortadella is a Professor of the Computer Science Department at the Universitat Politècnica de Catalunya. He is a Fellow of the IEEE and member of the Academia Europaea. He holds a M.S. and a Ph.D. degree in Computer Science (Universitat Politècnica de Catalunya, 1985 and 1987). In 1988, he was a Visiting Scholar at the University of California, Berkeley. His research interests include algorithms, formal methods and computer-aided design of VLSI systems with special emphasis on asynchronous circuits, concurrent systems and logic synthesis. He has co-authored numerous research papers and has been invited to present tutorials at various conferences.
Jordi Cortadella has served on the technical committees of several international conferences in the field of Design Automation and Concurrent Systems. He is associate editor of the IEEE Transactions on CAD of Integrated Circuits and Systems and SN Computer Science. He received best paper awards at the Int. Symp. on Advanced Research in Asynchronous Circuits and Systems (2004 and 2016), the Design Automation Conference (2004), the Int. Conf. on Application of Concurrency to System Design (2009) and the Int. Symp. on FPGAs (2020). In 2003, he was the recipient of a Distinction for the Promotion of the University Research by the Generalitat de Catalunya.