Datasheet for characterization corner: NangateOpenCellLibrary_typical_typical , library "NangateOpenCellLibrary".
Data for cell SDFFR_X2 (Sequential) . Eventual numbers in italic show that the values have required interpolations due to internal data manipulation and/or non-matching LUT index templates. See notes for additional information.

Summary

- General Cell Characteristics

Description Pos. edge Flip-Flop with active low reset, scan, and drive strength X2 Strength 2 Cell Area 6.916 um2 Equation Q = "(!(!RN)*(((SE * SI) + (D * !SE))))" QN = "((!RN)+!(((SE * SI) + (D * !SE))))" Q = "(!(!RN)*(((SE * SI) + (D * !SE))))" QN = "((!RN)+!(((SE * SI) + (D * !SE))))" Clock CK Reset RN Type Sequential Scan Enable SE Scan Data SI Input D Output Q, QN PG Pins VDD (primary_power), VSS (primary_ground)

State Table CK D RN SE SI IQ(int) IQN(int) Q QN R L H L - - - L H R H H L - - - H L R - H H L - - L H R - H H H - - H L F - H - - L H L H F - H - - H L H L - - L - - - - L H

- Schematic

- Capacitance

Capacitance [fF]
CK	0.9629
D	1.1373
RN	1.5279
SE	1.9225
SI	0.8786

- NLDM Capacitance

[input capacitance table (capacitance, [fall|rise]_capacitance and [fall|rise]_capacitance_range attributes)]

- Max Capacitance

[maximum allowed output capacitance]

- Timing




Propagation Delay [ns] Input Transition [ns] 0.0012 0.1985 Load Capacitance [fF] 0.3656 121.155 0.3656 121.155 CK to Q fall 0.09 0.20 0.11 0.22 rise 0.08 0.23 0.10 0.25 CK to QN fall 0.10 0.18 0.12 0.20 rise 0.12 0.26 0.14 0.28 RN to Q fall 0.17 0.28 0.25 0.36 RN to QN rise 0.20 0.34 0.29 0.42

Output Transition [ns] Input Transition [ns] 0.0012 0.1985 Load Capacitance [fF] 0.3656 121.155 0.3656 121.155 CK to Q fall 0.02 0.07 0.02 0.07 rise 0.01 0.14 0.01 0.14 CK to QN fall 0.01 0.07 0.01 0.07 rise 0.01 0.14 0.01 0.14 RN to Q fall 0.02 0.08 0.02 0.08 RN to QN rise 0.01 0.14 0.01 0.14

- Propagation Delay

[values from timing groups (cell_rise and cell_fall)]

- Output Transition

[values from timing groups (rise_transition and fall_transition)]

- Full-Cycle Delay

[values from cell_fall + cell_rise]

- Constrained Data to Output Delay

[delay from data pin to be reflected in the output (propagation delay + setup time)]

- Constraints

Constraints Time [ns]
Setup CK to D	fall	0.14
	rise	0.08
Hold CK to D	fall	0.14
	rise	0.07
Recovery CK to RN	rise	-0.02
Removal CK to RN	rise	0.06
Setup CK to SE	fall	0.13
	rise	0.10
Hold CK to SE	fall	0.12
	rise	0.08
Setup CK to SI	fall	0.15
	rise	0.09
Hold CK to SI	fall	0.13
	rise	0.06

- Setup Time

[values from timing groups (fall_constraint and rise_constraint tables with timing type equal to setup_rising or setup_falling)]

- Hold Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to hold_rising or hold_falling)]

- Setup/Hold Metastability Window

[synchronous metastability analysis (setup + hold time)]

- Recovery Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to recovery_rising or recovery_falling)]

- Removal Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to removal_rising or removal_falling)]

- Recovery + Removal

[asynchronous clear + preset constraints analysis (recovery + removal time)]

- Minimum Pulse Width

[values from timing groups (minimum pulse width timing arcs - fall_constraint and rise_constraint and min_pulse_width_[high|low] attributes)]



Constraints Time [ns] Setup CK to D fall 0.14 rise 0.08 Hold CK to D fall 0.14 rise 0.07 Recovery CK to RN rise -0.02 Removal CK to RN rise 0.06 Setup CK to SE fall 0.13 rise 0.10 Hold CK to SE fall 0.12 rise 0.08 Setup CK to SI fall 0.15 rise 0.09 Hold CK to SI fall 0.13 rise 0.06

Capacitance [fF] CK 0.9629 D 1.1373 RN 1.5279 SE 1.9225 SI 0.8786

Leakage [nW] 141.96



- Power

Leakage [nW]
141.96

Input Pin Power Consumption [nW/GHz] Input Transition [ns] 0.0012 0.1985 CK fall 5624.33 7598.60 rise 4866.47 6815.34 D fall 2665.43 3169.08 rise 1215.56 1649.20 RN fall 1039.06 1132.92 rise -491.21 -435.24 SE fall 3830.23 6454.77 rise 1530.98 3973.94 SI fall 2558.88 2915.10 rise 1048.92 1350.32

Dynamic Power Consumption [uW/GHz] Input Transition [ns] 0.0012 0.1985 Load Capacitance [fF] 0.3656 121.155 0.3656 121.155 CK to Q fall 8.79 7.86 9.78 8.88 rise 6.92 7.59 7.90 8.39 CK to QN fall 6.92 7.58 7.90 8.56 rise 8.79 7.98 9.77 8.94 RN to Q fall 8.78 7.80 9.36 8.24 RN to QN rise 8.79 7.81 9.36 8.22

- Static Power Consumption

[leakage power data (leakage_power group and cell_leakage_power attribute)]

- Dynamic Power Consumption

[values from internal_power groups in output pins (rise_power, fall_power and power)]

- Full-Cycle Power Consumption

[values from fall_power + rise_power]

- Total Power Consumption

[sum of internal_power groups from output and input pins (rise_power, fall_power and power)]

- Total Full-Cycle Power Consumption

[values from total fall power + total rise power]

- Input Pin Power Consumption

[values from internal_power groups in input pins(rise_power, fall_power and power)]

- Notes

---

• Conditions for characterization library NangateOpenCellLibrary, corner NangateOpenCellLibrary_typical_typical: Vdd= 1.10V, Tj= 25.0 deg. C . Additional corners: NangateOpenCellLibrary [NangateOpenCellLibrary_slow_slow], NangateOpenCellLibrary [NangateOpenCellLibrary_fast_fast], NangateOpenCellLibrary [NangateOpenCellLibrary_low_temp_low_temp], NangateOpenCellLibrary [NangateOpenCellLibrary_worst_low_worst_low].
  
Output transition is defined from 30% to 70% (rising) and from 70% to 30% (falling) output voltage.
Propagation delay is measured from 50% (input rise) or 50% (input fall) to 50% (output rise) or 50% (output fall).


Conditions for characterization library NangateOpenCellLibrary, corner NangateOpenCellLibrary_typical_typical: Vdd= 1.10V, Tj= 25.0 deg. C . Additional corners: NangateOpenCellLibrary [NangateOpenCellLibrary_slow_slow], NangateOpenCellLibrary [NangateOpenCellLibrary_fast_fast], NangateOpenCellLibrary [NangateOpenCellLibrary_low_temp_low_temp], NangateOpenCellLibrary [NangateOpenCellLibrary_worst_low_worst_low].
Output transition is defined from 30% to 70% (rising) and from 70% to 30% (falling) output voltage.
Propagation delay is measured from 50% (input rise) or 50% (input fall) to 50% (output rise) or 50% (output fall).

- General Cell Characteristics

Description Pos. edge Flip-Flop with active low reset, scan, and drive strength X2 Strength 2 Cell Area 6.916 um2 Equation Q = "(!(!RN)*(((SE * SI) + (D * !SE))))" QN = "((!RN)+!(((SE * SI) + (D * !SE))))" Q = "(!(!RN)*(((SE * SI) + (D * !SE))))" QN = "((!RN)+!(((SE * SI) + (D * !SE))))" Clock CK Reset RN Type Sequential Scan Enable SE Scan Data SI Input D Output Q, QN PG Pins VDD (primary_power), VSS (primary_ground)

State Table CK D RN SE SI IQ(int) IQN(int) Q QN R L H L - - - L H R H H L - - - H L R - H H L - - L H R - H H H - - H L F - H - - L H L H F - H - - H L H L - - L - - - - L H

- NLDM Capacitance

[input capacitance table (capacitance, [fall|rise]_capacitance and [fall|rise]_capacitance_range attributes)]

- Max Capacitance

[maximum allowed output capacitance]

- Propagation Delay

[values from timing groups (cell_rise and cell_fall)]

- Output Transition

[values from timing groups (rise_transition and fall_transition)]

- Full-Cycle Delay

[values from cell_fall + cell_rise]

- Constrained Data to Output Delay

[delay from data pin to be reflected in the output (propagation delay + setup time)]

- Setup Time

[values from timing groups (fall_constraint and rise_constraint tables with timing type equal to setup_rising or setup_falling)]

- Hold Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to hold_rising or hold_falling)]

- Setup/Hold Metastability Window

[synchronous metastability analysis (setup + hold time)]

- Recovery Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to recovery_rising or recovery_falling)]

- Removal Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to removal_rising or removal_falling)]

- Recovery + Removal

[asynchronous clear + preset constraints analysis (recovery + removal time)]

- Minimum Pulse Width

[values from timing groups (minimum pulse width timing arcs - fall_constraint and rise_constraint and min_pulse_width_[high|low] attributes)]

- Static Power Consumption

[leakage power data (leakage_power group and cell_leakage_power attribute)]

- Dynamic Power Consumption

[values from internal_power groups in output pins (rise_power, fall_power and power)]

- Full-Cycle Power Consumption

[values from fall_power + rise_power]

- Total Power Consumption

[sum of internal_power groups from output and input pins (rise_power, fall_power and power)]

- Total Full-Cycle Power Consumption

[values from total fall power + total rise power]

- Input Pin Power Consumption

[values from internal_power groups in input pins(rise_power, fall_power and power)]

Schematic

---

Capacitance

NLDM Capacitance

[input capacitance table (capacitance, [fall|rise]_capacitance and [fall|rise]_capacitance_range attributes)]

Gate Capacitance for All Cells

Max Capacitance

[maximum allowed output capacitance]

Maximum Capacitance for All Cells

Timing

Propagation Delay

rise / fall

[values from timing groups (cell_rise and cell_fall)]

Propagation Delay for All Cells

---

Output Transition

rise / fall

[values from timing groups (rise_transition and fall_transition)]

Output Transition for All Cells

---

Full-Cycle Delay

[values from cell_fall + cell_rise]

Full-Cycle Delay for All Cells

---

Constrained Data to Output Delay

[delay from data pin to be reflected in the output (propagation delay + setup time)]

Constrained Data to Output Delay for All Cells

Constraints

Setup Time

[values from timing groups (fall_constraint and rise_constraint tables with timing type equal to setup_rising or setup_falling)]

Setup Time for All Cells

---

Hold Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to hold_rising or hold_falling)]

Hold Time for All Cells

---

Setup/Hold Metastability Window

[synchronous metastability analysis (setup + hold time)]

Setup/Hold Metastability Window for All Cells

Recovery Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to recovery_rising or recovery_falling)]

Recovery Time for All Cells

---

Removal Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to removal_rising or removal_falling)]

Removal Time for All Cells

---

Recovery + Removal

[asynchronous clear + preset constraints analysis (recovery + removal time)]

Recovery + Removal for All Cells

Minimum Pulse Width

[values from timing groups (minimum pulse width timing arcs - fall_constraint and rise_constraint and min_pulse_width_[high|low] attributes)]

---

Power

Static Power Consumption

[leakage power data (leakage_power group and cell_leakage_power attribute)]

Static Power Consumption for All Cells

---

Leakage [nW]
141.96

Dynamic Power Consumption

[values from internal_power groups in output pins (rise_power, fall_power and power)]

Dynamic Power Consumption (fall) for All Cells

Dynamic Power Consumption (rise) for All Cells

---

Full-Cycle Power Consumption

[values from fall_power + rise_power]

Full-Cycle Power Consumption for All Cells

---

Total Power Consumption

[sum of internal_power groups from output and input pins (rise_power, fall_power and power)]

Total Power Consumption (fall) for All Cells

Total Power Consumption (rise) for All Cells

---

Total Full-Cycle Power Consumption

[values from total fall power + total rise power]

Total Full-Cycle Power Consumption for All Cells

---

Input Pin Power Consumption

[values from internal_power groups in input pins(rise_power, fall_power and power)]

---