Datasheet for characterization corner: NangateOpenCellLibrary_fast_fast , library "NangateOpenCellLibrary".
Data for cell CLKGATETST_X4 (Sequential) . Eventual numbers in italic show that the values have required interpolations due to internal data manipulation and/or non-matching LUT index templates. See notes for additional information.

Summary

- General Cell Characteristics

Strength 4 Cell Area 5.320 um2 Enable E Type Sequential Output GCK PG Pins VDD (primary_power), VSS (primary_ground)

State Table CK E SE IQ(int) GCK L L L - L L L H - L L H L - L L H H - L H L L L L H L L H H H L H L L H L H H H H H L L L H H L H H H H H L L H H H H H

- Schematic

- Capacitance

Capacitance [fF]
CK	4.5138
E	0.9399
SE	0.8241

- NLDM Capacitance

[input capacitance table (capacitance, [fall|rise]_capacitance and [fall|rise]_capacitance_range attributes)]

- Max Capacitance

[maximum allowed output capacitance]

- Timing




Propagation Delay [ns] Input Transition [ns] 0.0009 0.1462 Load Capacitance [fF] 0.3656 242.92 0.3656 242.92 CK to GCK fall 0.01 0.14 0.05 0.18 rise 0.01 0.10 0.02 0.11

Output Transition [ns] Input Transition [ns] 0.0009 0.1462 Load Capacitance [fF] 0.3656 242.92 0.3656 242.92 CK to GCK fall 0.00 0.11 0.01 0.11 rise 0.00 0.08 0.01 0.08

- Propagation Delay

[values from timing groups (cell_rise and cell_fall)]

- Output Transition

[values from timing groups (rise_transition and fall_transition)]

- Full-Cycle Delay

[values from cell_fall + cell_rise]

- Constraints

Constraints Time [ns]
Setup CK to E	fall	0.10
	rise	0.10
Hold CK to E	fall	0.08
	rise	0.06
Setup CK to SE	fall	0.11
	rise	0.10
Hold CK to SE	fall	0.09
	rise	0.06

- Setup Time

[values from timing groups (fall_constraint and rise_constraint tables with timing type equal to setup_rising or setup_falling)]

- Hold Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to hold_rising or hold_falling)]

- Setup/Hold Metastability Window

[synchronous metastability analysis (setup + hold time)]

- Minimum Pulse Width

[values from timing groups (minimum pulse width timing arcs - fall_constraint and rise_constraint and min_pulse_width_[high|low] attributes)]



Constraints Time [ns] Setup CK to E fall 0.10 rise 0.10 Hold CK to E fall 0.08 rise 0.06 Setup CK to SE fall 0.11 rise 0.10 Hold CK to SE fall 0.09 rise 0.06

Capacitance [fF] CK 4.5138 E 0.9399 SE 0.8241

Leakage [nW] 466.38



- Power

Leakage [nW]
466.38

Input Pin Power Consumption [nW/GHz] Input Transition [ns] 0.0009 0.1462 CK fall 14238.98 23158.94 rise 157.01 8712.69 E fall 3597.75 5863.65 rise 1947.18 4482.78 SE fall 3094.91 5817.82 rise 1884.45 4725.02

Dynamic Power Consumption [uW/GHz] Input Transition [ns] 0.0009 0.1462 Load Capacitance [fF] 0.3656 242.92 0.3656 242.92 CK to GCK fall 17.38 21.04 52.28 55.52 rise 10.57 11.93 36.88 43.60

- Static Power Consumption

[leakage power data (leakage_power group and cell_leakage_power attribute)]

- Dynamic Power Consumption

[values from internal_power groups in output pins (rise_power, fall_power and power)]

- Full-Cycle Power Consumption

[values from fall_power + rise_power]

- Total Power Consumption

[sum of internal_power groups from output and input pins (rise_power, fall_power and power)]

- Total Full-Cycle Power Consumption

[values from total fall power + total rise power]

- Input Pin Power Consumption

[values from internal_power groups in input pins(rise_power, fall_power and power)]

- Notes

---

• Conditions for characterization library NangateOpenCellLibrary, corner NangateOpenCellLibrary_fast_fast: Vdd= 1.25V, Tj= .0 deg. C . Additional corners: NangateOpenCellLibrary [NangateOpenCellLibrary_typical_typical], NangateOpenCellLibrary [NangateOpenCellLibrary_slow_slow], NangateOpenCellLibrary [NangateOpenCellLibrary_low_temp_low_temp], NangateOpenCellLibrary [NangateOpenCellLibrary_worst_low_worst_low].
  
Output transition is defined from 30% to 70% (rising) and from 70% to 30% (falling) output voltage.
Propagation delay is measured from 50% (input rise) or 50% (input fall) to 50% (output rise) or 50% (output fall).


Conditions for characterization library NangateOpenCellLibrary, corner NangateOpenCellLibrary_fast_fast: Vdd= 1.25V, Tj= .0 deg. C . Additional corners: NangateOpenCellLibrary [NangateOpenCellLibrary_typical_typical], NangateOpenCellLibrary [NangateOpenCellLibrary_slow_slow], NangateOpenCellLibrary [NangateOpenCellLibrary_low_temp_low_temp], NangateOpenCellLibrary [NangateOpenCellLibrary_worst_low_worst_low].
Output transition is defined from 30% to 70% (rising) and from 70% to 30% (falling) output voltage.
Propagation delay is measured from 50% (input rise) or 50% (input fall) to 50% (output rise) or 50% (output fall).

- General Cell Characteristics

Strength 4 Cell Area 5.320 um2 Enable E Type Sequential Output GCK PG Pins VDD (primary_power), VSS (primary_ground)

State Table CK E SE IQ(int) GCK L L L - L L L H - L L H L - L L H H - L H L L L L H L L H H H L H L L H L H H H H H L L L H H L H H H H H L L H H H H H

- NLDM Capacitance

[input capacitance table (capacitance, [fall|rise]_capacitance and [fall|rise]_capacitance_range attributes)]

- Max Capacitance

[maximum allowed output capacitance]

- Propagation Delay

[values from timing groups (cell_rise and cell_fall)]

- Output Transition

[values from timing groups (rise_transition and fall_transition)]

- Full-Cycle Delay

[values from cell_fall + cell_rise]

- Setup Time

[values from timing groups (fall_constraint and rise_constraint tables with timing type equal to setup_rising or setup_falling)]

- Hold Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to hold_rising or hold_falling)]

- Setup/Hold Metastability Window

[synchronous metastability analysis (setup + hold time)]

- Minimum Pulse Width

[values from timing groups (minimum pulse width timing arcs - fall_constraint and rise_constraint and min_pulse_width_[high|low] attributes)]

- Static Power Consumption

[leakage power data (leakage_power group and cell_leakage_power attribute)]

- Dynamic Power Consumption

[values from internal_power groups in output pins (rise_power, fall_power and power)]

- Full-Cycle Power Consumption

[values from fall_power + rise_power]

- Total Power Consumption

[sum of internal_power groups from output and input pins (rise_power, fall_power and power)]

- Total Full-Cycle Power Consumption

[values from total fall power + total rise power]

- Input Pin Power Consumption

[values from internal_power groups in input pins(rise_power, fall_power and power)]

Schematic

---

Capacitance

NLDM Capacitance

[input capacitance table (capacitance, [fall|rise]_capacitance and [fall|rise]_capacitance_range attributes)]

Gate Capacitance for All Cells

Max Capacitance

[maximum allowed output capacitance]

Maximum Capacitance for All Cells

Timing

Propagation Delay

rise / fall

[values from timing groups (cell_rise and cell_fall)]

Propagation Delay for All Cells

---

Output Transition

rise / fall

[values from timing groups (rise_transition and fall_transition)]

Output Transition for All Cells

---

Full-Cycle Delay

[values from cell_fall + cell_rise]

Full-Cycle Delay for All Cells

---

Constraints

Setup Time

[values from timing groups (fall_constraint and rise_constraint tables with timing type equal to setup_rising or setup_falling)]

Setup Time for All Cells

---

Hold Time

[values from timing groups (fall_constraint and rise_constraint with timing type equal to hold_rising or hold_falling)]

Hold Time for All Cells

---

Setup/Hold Metastability Window

[synchronous metastability analysis (setup + hold time)]

Setup/Hold Metastability Window for All Cells

Minimum Pulse Width

[values from timing groups (minimum pulse width timing arcs - fall_constraint and rise_constraint and min_pulse_width_[high|low] attributes)]

---

Power

Static Power Consumption

[leakage power data (leakage_power group and cell_leakage_power attribute)]

Static Power Consumption for All Cells

---

Leakage [nW]
466.38

Dynamic Power Consumption

[values from internal_power groups in output pins (rise_power, fall_power and power)]

Dynamic Power Consumption (fall) for All Cells

Dynamic Power Consumption (rise) for All Cells

---

Full-Cycle Power Consumption

[values from fall_power + rise_power]

Full-Cycle Power Consumption for All Cells

---

Total Power Consumption

[sum of internal_power groups from output and input pins (rise_power, fall_power and power)]

Total Power Consumption (fall) for All Cells

Total Power Consumption (rise) for All Cells

---

Total Full-Cycle Power Consumption

[values from total fall power + total rise power]

Total Full-Cycle Power Consumption for All Cells

---

Input Pin Power Consumption

[values from internal_power groups in input pins(rise_power, fall_power and power)]

---