Layout synthesis
Placement and routing are extremely complex tasks required to produce the physical layout of a circuit. This is a new research area for our group in which we foresee to offer novel contributions in short. The experience of some of our members in graph theory, graph drawing and heuristic algorithms led us to explore new paradigms for placement. In particular, we are studying multi-level algorithms and methods to extract regularity, aiming at producing better layouts for circuits with embedded regularity.
Here is the result of one of our algorithms to draw a graph with embedded regularity:
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Graph drawing using a conventional force-directed multi-level algorithm. |
The same graph drawn after detecting regularity. |