Master thesis advisor
-
[Fra24]
-
Víctor Franco.
Combinatorial and Numerical Optimization Techniques for
Floorplanning, January 2024.
[ bib |
]
-
[Arr23]
-
Marta Arriaza.
Non-linear models for chip floorplanning, June 2023.
[ bib |
]
-
[Bar22]
-
Pol Barrachina.
AIG transformations to improve LUT mapping in FPGAs, June 2022.
[ bib |
]
-
[Fol20]
-
Júlia Folguera.
Architectural Layout Design with Spectral Methods, October 2020.
[ bib |
]
-
[Pri19]
-
Roberta Priolo.
Proximity-based resource sharing in high level synthesis for FPGAs,
December 2019.
Co-advised with Luciano Lavagno.
[ bib |
]
-
[Ric17]
-
Narcís Ricart.
Machine learning techniques for resource prediction in nanoelectronic
circuit design, July 2017.
Co-advised with Jonàs Casanova.
[ bib |
]
-
[Vid15]
-
Alexandre Vidal.
Sat-based algorithms for internal cell routing in nanoelectronic
circuits, October 2015.
Co-advised with Jordi Petit.
[ bib |
]
-
[Mor15]
-
Alberto Moreno.
Synthesis of timing paths with delays adaptable to integrated circuit
variability, July 2015.
[ bib |
]
-
[Riv14]
-
Daniel Rivas.
Trace compression mechanisms for the efficient simulation of CMP,
July 2014.
Co-advised with Francesc Guim.
[ bib |
]
-
[Alv14]
-
Alex Alvarez.
Library-free technology mapping for vlsi circuits with regular
layouts, July 2014.
Co-advised with Sachin Sapatnekar.
[ bib |
]
-
[dSP12]
-
Javier de San Pedro.
A simulation framework for hierarchical Network-on-Chip systems,
July 2012.
Co-advised with Josep Carmona.
[ bib |
]
-
[Ziy08]
-
Andrey Ziyatdinov.
Multi-Clustering net Model for VLSI Placement, September 2008.
[ bib |
]
-
[Cas08]
-
Jonàs Casanova.
Clustering for the optimization of asynchronous controllers, June
2008.
[ bib |
]
-
[Buf08]
-
Dmitry Bufistov.
Performance optimization of latency insensitive systems, February
2008.
[ bib ]
-
[GO07]
-
Marc Galceran-Oms.
Elastic Esterel, July 2007.
Co-advised with Gérard Berry.
[ bib |
]
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